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general description the max3349ea ?5kv esd-protected, usb transceiv- er provides a full-speed usb interface to a lower voltage microprocessor or asic. the device supports enumera- tion, suspend, and vbus detection. a special uart multiplexing mode routes external uart signals (rx and tx) to d+ and d-, allowing the use of a shared connec- tor to reduce cost and part count for mobile devices. the uart interface allows mobile devices such as pdas, cellular phones, and digital cameras to use either uart or usb signaling through the same connector. the max3349ea features a separate uart voltage sup- ply input to support legacy devices using +2.75v signal- ing. the max3349ea supports a maximum uart baud rate of 921kbaud. upon connection to a usb host, the max3349ea enters usb mode and provides a full-speed usb 2.0 compliant interface through vp, vm, rcv, and oe . the max3349ea features internal series termination resistors on d+ and d-, and an internal 1.5k ? pullup resistor to d+ to allow the device to logically connect and discon- nect from the usb while plugged in. a suspend mode is provided for low-power operation. d+ and d- are pro- tected from electrostatic discharge (esd) up to ?5kv. the max3349ea is available in 16-pin tqfn (4mm x 4mm) and 16-bump ucsp (2mm x 2mm) packages, and is specified over the -40? to +85? extended tem- perature range. applications cell phones pdas digital cameras mp3 players features ? 15kv esd hbm protection on d+ and d- ? uart mode routes external uart signals to d+/d- ? internal linear regulator allows direct powering from the usb cable ? separate voltage input for uart transmitter/receiver (v uart ) ? internal 1.5k ? pullup resistor on d+ controlled by enumerate input ? internal series termination resistors on d+ and d- ? complies with usb specification revision 2.0, full-speed 12mbps operation ? built-in level shifting down to +1.4v, ensuring compatibility with low-voltage asics ? v bus detection ? combined vp and vm inputs/outputs ? no power-supply sequencing required ? available in 16-bump ucsp (2mm x 2mm) package max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode ________________________________________________________________ maxim integrated products 1 19-0667; rev 0; 10/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information tqfn-ep (4mm x 4mm) enum 16 1234 12 11 10 9 15 14 13 5 6 7 8 vm v l v trm v bus d+ d- gnd rx tx bd vp rcv oe sus v uart max3349ea top view *ep + ucsp (2mm x 2mm) (bumps on bottom of die) max3349ea top view a b c 1 23 rx tx v uart vp v l enum sus v trm bd vm rcv oe 4 d d+ d- v bus gnd *exposed paddle?onnect to gnd or leave unconnected. + + denotes lead-free package. part pin-package pkg code max3349eaebe+t 16 ucsp b16-1 max3349eaete** 16 tqfn-ep* t1644-4 pin configurations ucsp is a trademark of maxim integrated products, inc. note: all devices specified for the -40? to +85? extended temperature range. ** future product?ontact factory for availability. * ep = exposed paddle. + indicates lead-free package.
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd, unless otherwise noted.) v uart , v l , v bus , d+, d- ..........................................-0.3v to +6v v trm .........................................................-0.3v to (v bus + 0.3v) vp, vm, sus, rx, tx, enum, rcv, oe , bd, -0.3v to (v l + 0.3v) short circuit current (d+ and d-)...................................?50ma maximum continuous current (all other pins) .................?5ma continuous power dissipation (t a = +70?) 16-bump ucsp (derate 8.2mw/? above +70?) ....659.5mw 16-pin 4mm x 4mm tqfn (derate 25.0mw/? above +70?).............................................................2000mw operating temperature range ...........................-40? to +85? junction temperature .....................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? bump temperature (soldering, reflow) ............................+235? electrical characteristics (v bus = +4.0v to +5.5v, v uart = +2.7v to +3.3v, v l = +1.40v to +2.75v, t a = -40? to +85?, unless otherwise noted. typical val- ues are at v bus = +5v, v l = +1.8v, v uart = +2.75v (uart mode), and t a = +25?.) (note 1) parameter symbol conditions min typ max units supply inputs/outputs (v bus , v uart , v trm , v l ) v bus input range v bus usb mode 4.0 5.5 v v l input range v l 1.40 2.75 v v uart input range v uart uart mode 2.7 3.3 v regulated supply-voltage output v trm internal regulator, usb mode 3.0 3.6 v operating v bus supply current i bus full-speed transmitting/receiving at 12mbps, c l = 50pf on d+ and d- 10 ma operating v uart supply current i vuart uart transmitting/receiving at 921kbaud, c l = 200pf 2.5 ma static v uart supply current i vuart ( static ) uart mode 3.5 5 a operating v l supply current i vl full-speed transmitting/receiving at 12mbps, c l = 50pf on d+ and d- 6ma full-speed idle, v d+ > +2.7v, v d- < +0.3v 290 400 full-speed idle and se0 supply current i vbus(idle) se0: v d+ < +0.3v, v d- < +0.3v 340 450 ? static v l supply current i vl(static) full-speed idle, se0, suspend mode, or static uart mode 210a sharing mode v l supply current i vl(off) v bus and v uart not present 2 5 ? usb suspend v bus supply current i vbus(sus) vm, vp unconnected; oe = 1, sus = 1 38 65 ? v bus detection (bd) v l = +1.8v 1.8 2.7 3.4 usb power-supply detection threshold v th_vbus v l = +2.5v 2.3 3.2 4.0 v v l = +1.8v 80 usb power-supply detection hysteresis v hys_vbus v l = +2.5v 100 mv v l power-supply detection threshold v th_vl 0.7 v
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode _______________________________________________________________________________________ 3 electrical characteristics (continued) (v bus = +4.0v to +5.5v, v uart = +2.7v to +3.3v, v l = +1.40v to +2.75v, t a = -40? to +85?, unless otherwise noted. typical val- ues are at v bus = +5v, v l = +1.8v, v uart = +2.75v (uart mode), and t a = +25?.) (note 1) parameter symbol conditions min typ max units v uart power-supply detection threshold v th_uart 0.4 x v l 0.65 x v l 0.9 x v l v digital inputs/outputs (vp, vm, rcv, sus, oe , rx, tx, enum, bd) input voltage low v il 0.3 x v l v input voltage high v ih 0.7 x v l v output voltage low v ol i ol = +2ma, v l > 1.65v i ol = +1ma, v l < 1.65v 0.4 v output voltage high v oh i oh = +2ma, v l > 1.65v i oh = +1ma, v l < 1.65v v l - 0.4 v input leakage current i lkg -1 +1 ? analog inputs/outputs (d+, d- in usb mode) differential input sensitivity v id | v d+ - v d- | 0.2 v differential common-mode voltage v cm includes v id range 0.8 2.5 v single-ended input low voltage v ilse 0.8 v single-ended input high voltage v ihse 2.0 v usb output voltage low v usb_old r l = 1.5k ? connected to +3.6v 0.3 v usb output voltage high v usb_ohd r l = 15k ? connected to gnd 2.8 3.6 v off-state leakage current i lz -10 +10 ? driver output impedance z drv steady-state drive 29.0 38 43.5 ? transceiver capacitance c ind measured from d+/d- to gnd 20 pf input impedance z in driver off 0.9 1.3 2.0 m ? d+ internal pullup resistor r pu enum = 1 1425 1500 1575 ? analog inputs/outputs (d+, d- in uart mode) input voltage high v uart_ih uart mode, +2.70 < v uart < +2.85v 2.0 v input voltage low v uart_il uart mode, +2.70v < v uart < +2.85v 0.8 v output voltage high v uart_oh uart mode, +2.70v < v uart < +2.85v i uart_oh = -2ma 2.2 v output voltage low v uart_ol uart mode, +2.70v < v uart < +2.85v i uart_ol = +2ma 0.4 v
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 4 _______________________________________________________________________________________ electrical characteristics (continued) (v bus = +4.0v to +5.5v, v uart = +2.7v to +3.3v, v l = +1.40v to +2.75v, t a = -40? to +85?, unless otherwise noted. typical val- ues are at v bus = +5v, v l = +1.8v, v uart = +2.75v (uart mode), and t a = +25?.) (note 1) parameter symbol conditions min typ max units esd protection (d+, d-) human body model (figures 9 and 10) ?5 kv iec 61000-4-2 air-gap discharge ? kv iec 61000-4-2 contact discharge ? kv timing characteristics (v bus = +4.0v to +5.5v, v uart = +2.7v to +3.3v, v l = +1.4v to +2.75v, t a = -40? to +85?, unless otherwise noted. typical values are at v bus = +5v, v l = +1.8v, v uart = +2.75v (uart mode), and t a = +25?.) (note 1) parameter symbol conditions min typ max units usb driver characteristics (c l = 50pf) rise time t fr 10% to 90% of | v usb_ohd - v usb_old | (figures 1 and 7) 420ns fall time t ff 90% to 10% of | v usb_ohd - v usb_old | (figures 1 and 7) 420ns rise/fall time matching t fr /t ff excluding the first transition from idle state (note 2) (figures 1 and 7) 90 110 % output signal crossover voltage v crs_f excluding the first transition from idle state (note 2) (figure 2) 1.3 2.0 v v l > +1.65v (figures 2 and 7) 22.5 t plh_drv +1.4v < v l < +1.65v (figures 2 and 7) 25 v l > +1.65v (figures 2 and 7) 22.5 driver propagation delay t phl_drv +1.4v < v l < +1.65v (figures 2 and 7) 25 ns t phz_drv high-to-off transition (figures 3 and 6) 25 driver disable delay t plz_drv low-to-off transition (figures 3 and 6) 25 ns t pzh_drv off-to-high transition (figures 3 and 7) 25 driver enable delay t pzl_drv off-to-low transition (figures 3 and 7) 25 ns usb receiver characteristics (c l = 15pf) v l > +1.65v (figures 4 and 8) 25 t plh_rcv +1.4v < v l < +1.65v (figures 4 and 8) 30 v l > +1.65v (figures 4 and 8) 25 differential receiver propagation delay t phl_rcv 1.4v < v l < +1.65v (figures 4 and 8) 30 ns v l > +1.65v (figures 4 and 8) 28 t plh_se +1.4v < v l < +1.65v (figures 4 and 8) 35 v l > +1.65v (figures 4 and 8) 28 single-ended receiver propagation delay t phl_se +1.4v < v l < +1.65v (figures 4 and 8) 35 ns
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode _______________________________________________________________________________________ 5 timing characteristics (continued) (v bus = +4.0v to +5.5v, v uart = +2.7v to +3.3v, v l = +1.4v to +2.75v, t a = -40? to +85?, unless otherwise noted. typical values are at v bus = +5v, v l = +1.8v, v uart = +2.75v (uart mode), and t a = +25?.) (note 1) parameter symbol conditions min typ max units high-to-off transition, v l > +1.65v (figure 5) 10 t phz_se high-to-off transition, +1.4v < v l < +1.65v (figure 5) 12 low-to-off transition, v l > +1.65v (figure 5) 10 single-ended receiver disable delay t plz_se low-to-off transition, +1.4v < v l < +1.65v (figure 5) 12 ns off-to-high transition, v l > +1.65v (figure 5) 20 t pzh_se off-to-high transition, +1.4v < v l < +1.65 (figure 5) 20 off-to-low transition, v l > +1.65v (figure 5) 20 single-ended receiver enable delay t pzl_se off-to-low transition, +1.4v < v l < +1.65v (figure 5) 20 ns uart driver characteristics (c l = 200pf) rise time (d-) t fr_tuart 10% to 90% of | v ohd - v old | (figure 13) 60 200 ns fall time (d-) t ff_tuart 90% to 10% of | v ohd - v old | (figure 13) 60 200 ns t plh_tuart (figure 13) 70 200 driver propagation delay t phl_tuart (figure 13) 70 200 ns uart receiver characteristics (c l = 15pf) t plh_ruart (figure 14) 60 receiver (rx) propagation delay t phl_ruart (figure 14) 60 ns t fr_ruart (figure 14) 45 receiver (rx) rise/fall time t ff_ruart (figure 14) 45 ns note 1: parameters are 100% production tested at t a =+25?, unless otherwise noted. limits over temperature are guaranteed by design. note 2: guaranteed by design, not production tested.
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 6 _______________________________________________________________________________________ t ypical operating characteristics (v bus = +5v, v l = +3.3v, v uart = +2.75v, t a = +25?, unless otherwise noted.) 0 10 30 20 40 50 1.4 1.8 1.6 2.0 2.2 2.4 2.6 single-ended receiver propagation delay vs. v l max3349ea toc01 v l (v) propagation delay (ns) t a = +85 c t a = +25 c t a = -40 c 12 14 18 16 20 22 4.00 4.50 4.25 4.75 5.00 5.25 5.50 single-ended receiver propagation delay vs. v bus max3349ea toc02 v bus (v) propagation delay (ns) t a = +85 c t a = +25 c t a = -40 c 0 1 3 2 4 5 1.4 1.8 1.6 2.0 2.2 2.4 2.6 logic current consumption in suspend mode max3349ea toc03 v l (v) i vl ( a) 30 33 32 31 34 35 36 37 38 39 40 4.00 4.50 4.25 4.75 5.00 5.25 5.50 v bus current consumption in suspend mode max3349ea toc04 v bus (v) i vcc ( a) 0.45 0.47 0.51 0.49 0.53 0.55 080 40 120 160 200 240 v l current during usb operation vs. d+/d- capacitance max3349ea toc05 d+/d- capacitance (c l ) i vl (ma) 12mbps data rate transmitting 0 4 12 8 16 20 080 40 120 160 200 240 v bus current during usb operation vs. d+/d- capacitance max3349ea toc06 d+/d- capacitance (c l ) i vbus (ma) 12mbps data rate transmitting 10ns/div suspend mode rcv 2v/div sus 2v/div max3349ea toc07 4 s/div bus detect response bd 1v/div v bus 2v/div max3349ea toc08
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode _______________________________________________________________________________________ 7 pin description pin ucsp tqfn type name function a1 1 power v uart uart supply voltage. v uart powers the internal uart transmitter and receiver. connect a regulated voltage between +2.7v and +3.3v to v uart . bypass v uart to gnd with a 0.1? ceramic capacitor. a2 2 output rx uart receive output. in uart mode, rx is a level-shifted output that expresses the logic state of d+. a3 3 input tx uart transmit input. in uart mode, d- follows the logic state on tx. a4 4 output bd usb detect output. when v bus exceeds the v th-bus threshold, bd is logic-high to indicate that the max3349e is connected to a usb host. the max3349e operates in usb mode when bd is logic-high, and operates in uart mode when bd is logic- low. b1 15 power v l digital logic supply. connect a +1.4v to +2.75v supply to v l . bypass v l to gnd with a 0.1? or larger ceramic capacitor. b2 16 i/o vm receiver output/driver input. vm functions as a receiver output when oe = v l . vm follows the logic state of d- when receiving. vm functions as a driver input when oe = gnd (tables 2 and 3). b3 5 i/o vp receiver output/driver input. vp functions as a receiver output when oe = v l . vp follows the logic state of d+ when receiving. vp functions as a driver input when oe = gnd (tables 2 and 3). b4 6 output rcv differential receiver output. in usb mode, rcv is the output of the usb differential receiver (table 3). c1 14 power v trm internal regulator output. v trm provides a regulated +3.3v output. bypass v trm to gnd with a 1? ceramic capacitor. v trm draws power from v bus . do not power external circuitry from v trm . c2 13 input enum enumerate input. drive enum to v l to connect the internal 1.5k ? resistor from d+ to v trm (when v bus is present). drive enum to gnd to disconnect the internal 1.5k ? pullup resistor. enum has no effect when the device is in uart mode. c3 8 input sus suspend input. drive sus low for normal operation. drive sus high to force the max3349e into suspend mode. c4 7 input oe output enable. drive oe low to set vp/vm to transmitter inputs in usb mode. drive oe high to set vp/vm to receiver outputs in usb mode. oe has no effect when the device is in uart mode. d1 12 power v bus usb supply voltage. v bus provides power to the internal linear regulator when in usb mode. bypass v bus to gnd with a 0.1? ceramic capacitor. d2 11 i/o d+ usb differential data input/output. connect d+ directly to the usb connector. d3 10 i/o d- usb differential data input/output. connect d- directly to the usb connector. d4 9 power gnd ground ? p ep exposed paddle. connect exposed paddle to gnd.
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 8 _______________________________________________________________________________________ 90% 10% 90% 10% t fr , t fr_tuart t ff , t ff_tuart v usb_old , v old v usb_ohd , v ohd figure 1. rise and fall times vm vp d- d+ t plh_drv t phl_drv v crs_f vp and vm rise/fall times < 4ns figure 2. timing of vp and vm to d+ and d- oe d+/d- t plz_drv t pzl_drv t phz_drv t pzh_drv vp/vm connected to gnd, d+/d- connected to pullup vp/vm connected to v l , d+/d- connected to pulldown oe d+/d- figure 3. driver enable and disable timing +3v 0v rcv, vm, and vp v l d+/d- t plh_rcv , t plh_se t phl_rcv , t phl_se input rise/fall time < 4ns figure 4. d+/d- timing to vp, vm, and rcv timing diagrams
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode _______________________________________________________________________________________ 9 detailed description the max3349ea ?5kv esd-protected, usb transceiver provides a full-speed usb interface to a microprocessor or asic. the device supports enumeration, suspend, and v bus detection. a special uart multiplexing mode routes external uart signals (rx and tx) to d+ and d-, allowing the use of a shared connector to reduce cost and part count for mobile devices. the uart interface allows mobile devices such as pdas, cellular phones, and digital cameras to use either uart or usb signaling through the same connector. the max3349ea features a separate uart voltage supply input. the max3349ea supports a maximum uart baud rate of 921kbaud. upon connection to a usb host, the max3349ea enters usb mode and provides a full-speed usb 2.0 compliant interface through vp, vm, rcv, and oe . the max3349ea features internal series resistors on d+ and d-, and an internal 1.5k ? pullup resistor to d+ to allow the device to logically connect and disconnect from the usb bus while plugged in. a suspend mode is provided for low-power operation. d+ and d- are pro- tected from electrostatic discharge (esd) up to ?5kv. to ensure full ?5kv esd protection, bypass v bus to oe vp/vm vp/vm t plz_se t pzl_se t phz_se t pzh_se d+/d- connected to gnd, vp/vm connected to pullup d+/d- connected to +3v, vp/vm connected to pulldown oe figure 5. receiver enable and disable timing max3349ea 1. enable time (d+/d-) measurement d+/d- test point c l 50pf 15k ? 2. vp/vm to d+/d- propagation delay 3. d+/d- rise/fall times figure 7. test circuit for enable time, transmitter propagation delay, and transmitter rise/fall time max3349ea test point c l 15pf rcv/vp/vm 1. d+/d- to rcv/vm/vp propagation delays figure 8. test circuit for receiver propagation delay charge-current- limit resistor discharge resistance storage capacitor c s 100pf r c 1m ? r d 1.5k ? high- voltage dc source device under test figure 9. human body esd test model timing diagrams (continued) max3349ea 1. disable time (d+/d-) measurement v = 0 for t phz v = v trm for t plz d+/d- test point c l 50pf 220 ? figure 6. test circuit for disable time
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 10 ______________________________________________________________________________________ gnd with a 0.1f ceramic capacitor as close to the device as possible. there are high-impedance resistors ~2m ? to ground on d+ and d- to prevent floating nodes when in uart mode and nothing is connected. operating modes the max3349ea operates in either usb mode or uart mode, depending on the presence or absence of v bus . bus detect output bd is logic-high when a voltage higher than v th-vbus is applied to v bus , and logic-low otherwise. the max3349ea operates in usb mode when bd is logic-high, and uart mode when bd is logic-low. usb mode in usb mode, the max3349ea implements a full-speed (12mbps) usb interface on d+ and d-, with enumerate and suspend functions. a differential usb receiver pre- sents the usb state as a logic-level output rcv (table 3a). vp/vm are outputs of single-ended usb receivers when oe is logic-high, allowing detection of single- ended 0 (se0) events. when oe is logic-low, vp and vm serve as inputs to the usb transmitter. drive sus- pend input sus logic-high to force the max3349ea into a low-power operating mode and disable the differen- tial usb receiver (table 3b). uart mode the max3349ea operates in uart mode when bd is logic-low (v bus not present). the rx signal is the out- put of a single-ended receiver on d+, and the tx input is driven out on d-. signaling voltage thresholds for d+ and d- are determined by v uart , an externally applied voltage between +2.7v and +3.3v. power-supply configurations v l logic supply in both usb and uart modes, the control interface is powered from v l . the max3349ea operates with logic- side voltage (v l ) as low as +1.4v, providing level shift- ing for lower voltage asics and microcontrollers. timing diagrams (continued) i p 100% 90% 36.8% t rl time t dl current waveform peak-to-peak ringing (not drawn to scale) i r 10% 0 0 amperes figure 10. human body model current waveform charge-current- limit resistor discharge resistance storage capacitor c s 150pf r c 50m ? to 100m ? r d 330 ? high- voltage dc source device under test figure 11. iec61000-4-2 esd contact discharge test model t r = 0.7ns to 1ns 30ns 60ns t 100% 90% 10% i peak i figure 12. iec 61000-4-2 contact discharge model current waveform
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode ______________________________________________________________________________________ 11 usb mode the max3349ea is in usb mode when v bus is greater than v th-bus and the bus detect output (bd) is logic- high. in usb mode, power for the max3349ea is derived from v bus , typically provided through the usb connector. an internal linear regulator generates the required +3.3v v trm voltage from v bus . v trm powers the internal usb transceiver circuitry and the d+ enu- meration resistor. bypass v trm to gnd with a 1? ceramic capacitor as close to the device as possible. do not power external circuitry from v trm . disable mode connect v bus to a system power supply and leave v l unconnected or connect to ground to enter disable mode. in disable mode, d+ and d- are high imped- ance, and withstand external signals up to +5.5v. oe , sus, and control signals are ignored. uart mode connect v l and v uart to system power supplies, and leave v bus unconnected or below v th-bus to operate the max3349ea in uart mode. the max3349ea sup- ports v uart from +2.7v to +3.3v (see table 1). usb control signals oe oe controls the direction of communication for usb mode. when oe is logic-low, vp and vm operate as logic inputs, and d+/d- are outputs. when oe is logic- high, vp and vm operate as logic outputs, and d+/d- are inputs. rcv is the output of the differential usb receiver connected to d+/d-, and is not affected by the oe logic level. enum drive enum logic-high to enable the internal 1.5k ? pullup resistor from d+ to v trm . drive enum logic-low to disable the internal pullup resistor and logically dis- connect the max3349ea from the usb. sus operate the max3349ea in low-power usb suspend mode by driving sus logic-high. in suspend mode, the usb differential receiver is turned off and v bus con- sumes 38? (typ) of supply current. the single-ended vp and vm receivers remain active to detect a se0 state on usb bus lines d+ and d-. the usb transmitter remains enabled in suspend mode to allow transmis- sion of a remote wake-up on d+ and d-. v bus (v) v trm (v) v l (v) v uart (v) configuration +4.0 to +5.5 +3.0 to +3.6 output +1.4 to +2.75 gnd, unconnected, or +2.7v to +3.3v usb mode +4.0 to +5.5 +3.0 to +3.6 output gnd or unconnected gnd, unconnected, or +2.7v to +3.3v disable mode gnd or unconnected high impedance +1.4 to +2.75 +2.7v to +3.3v uart mode table 1. power-supply configuration inputs outputs vp vm d+ d- 000 0 010 1 101 0 111 1 table 2. usb transmit truth table ( oe = 0) inputs outputs d+ d- vp vm rcv 0000 rcv* 01010 10101 1111x table 3a. usb receive truth table ( oe = 1, sus = 0) inputs outputs d+ d- vp vm rcv 00000 01010 10100 11110 table 3b. usb receive truth table ( oe = 1, sus = 1) * = last state. x = undefined.
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 12 ______________________________________________________________________________________ d+ and d- d+ and d- are either usb signals or uart signals, depending on the operating mode. in usb mode, d+/d- serve as receiver inputs when oe is logic-high and transmitter outputs when oe is logic-low. internal series resistors are provided on d+ and d- to allow a direct interface with a usb connector. in uart mode, d+ is an input and d- is an output. uart signals on tx are presented on d-, and signals on d+ are presented on rx. the uart signaling levels for d+/d- are deter- mined by v uart . logic thresholds for rx and tx are determined by v l . d+ and d- are esd protected to ?5kv hbm. rcv rcv is the output of the differential usb receiver. rcv is a logic 1 for d+ high and d- low. rcv is a logic 0 for d+ low and d- high. rcv retains the last valid logic state when d+ and d- are both low (se0). rcv is driven logic-low when sus is high. see tables 3a and 3b. bd the bus-detect (bd) output is asserted logic-high when a voltage greater than v th-bus is presented on v bus . this is typically the case when the max3349ea is con- nected to a powered usb. bd is logic-low when v bus is unconnected. esd protection as with all maxim devices, esd-protection structures are incorporated on all pins to protect against electro- static discharges encountered during handling and assembly. additional esd-protection structures guard d+ and d- against damage from esd events up to ?5kv. the esd structures arrest esd events in all operating modes: normal operation, suspend mode, and when the device is unpowered. several esd testing standards exist for gauging the robustness of esd structures. the esd protection of the max3349ea is characterized to the following standards: ?5kv human body model (hbm) ?kv air-gap discharge per iec 61000-4-2 ?kv contact discharge per iec 61000-4-2 human body model figure 9 shows the model used to simulate an esd event resulting from contact with the human body. the model consists of a 100pf storage capacitor that is charged to a high voltage, then discharged through a 1.5k ? resistor. figure 10 shows the current waveform when the storage capacitor is discharged into a low impedance. iec 61000-4-2 contact discharge the iec 61000-4-2 standard covers esd testing and performance of finished equipment. it does not specifi- cally refer to integrated circuits. the major difference between tests done using the human body model and iec 61000-4-2 is a higher peak current in iec 61000-4-2 due to lower series resistance. hence, the esd with- stand voltage measured to iec 61000-4-2 is typically lower than that measured using the human body model. figure 11 shows the iec 61000-4-2 model. the contact discharge method connects the probe to the device before the probe is charged. figure 12 shows the current waveform for the iec 61000-4-2 contact discharge model. esd test conditions esd performance depends on a variety of conditions. please contact maxim for a reliability report document- ing test setup, methodology, and results. applications information data transfer in usb mode transmitting data to the usb to transmit data to the usb, operate the max3349ea in usb mode (see the operating modes section), and drive oe low. the max3349ea transmits data to the usb differentially on d+ and d-. vp and vm serve as differential input signals to the driver. when vp and vm are both driven low, a single-ended zero (se0) is output on d+/d-. receiving data from the usb to receive data from the usb, operate the max3349ea in usb mode (see the operating modes section.) drive oe high and sus low. differential data received at d+/d- appears as a logic signal at rcv. vp and vm are the outputs of single-ended receivers on d+ and d-. data transfer in uart mode in uart mode, d+ is an input and d- is an output. uart signals on tx are presented on d-, and signals on d+ are presented on rx. the uart signaling levels for d+/d- are determined by v uart . the voltage thresholds for rx and tx are determined by v l . the voltage thresholds for d+ and d- are determined by v uart . power-supply decoupling bypass v bus , v l , and v uart to ground with 0.1? ceramic capacitors. additionally, bypass v trm to ground with a 1? ceramic capacitor. place all bypass capacitors as close as possible to the device .
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode ______________________________________________________________________________________ 13 power sequencing there are no power-sequencing requirements for v l , v uart , and v bus . ucsp application information for the latest application details on ucsp construction, dimensions, tape carrier information, printed circuit- board techniques, bump-pad layout, and recommend- ed reflow temperature profile, as well as the latest information on reliability testing results, refer to the application note ucsp- a wafer-level chip- scale package available on maxim? website at www.maxim-ic.com/ucsp. tx 50% d- 50% 50% t plh_tuart 50% t phl_tuart t fr_tuart 10% 90% 10% t ff_tuart 90% figure 13. uart transmitter timing d+ 50% rx 50% 50% t plh_ruart 50% t phl_ruart t fr_ruart 10% 90% 10% t ff_ruart 90% figure 14. uart receiver timing timing diagrams
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 14 ______________________________________________________________________________________ asic usb serial- interface engine (sie) uart microcontroller v bus vp vm oe enum tx rx rcv bd v l sus v trm d+ / rx d- / tx v uart usb/uart connector 0.1 f 1 f 0.1 f 0.1 f max3349ea t ypical operating circuit chip information process: bicmos
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode ______________________________________________________________________________________ 15 3.3v linear regulator v bus bd d+ d- rcv vm vp oe rx tx enum v uart v trm 1.5k ? vth_vbus 38 ? 38 ? gnd usb differential transmitter usb receiver d- receiver level shifting v l sus d+ receiver uart rx uart tx functional diagram
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode 16 ______________________________________________________________________________________ package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 16l,ucsp.eps h 1 1 21-0101 package outline, 4x4 ucsp
max3349ea usb 2.0 full-speed transceiver with uart multiplexing mode maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 17 2006 maxim integrated products is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 24l qfn thin.eps package outline, 21-0139 2 1 e 12, 16, 20, 24, 28l thin qfn, 4x4x0.8mm package outline, 21-0139 2 2 e 12, 16, 20, 24, 28l thin qfn, 4x4x0.8mm
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs max3349ea part number table notes: see the max3349ea quickview data sheet for further information on this product family or download the max3349ea full data sheet (pdf, 388kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 4. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis max3349eaebe+ uc sp;16 pin; dwg: 21-0101h (pdf) use pkgcode/variation: b16+1 * -40c to +85c rohs/lead-free: yes materials analysis max3349eaebe+t uc sp;16 pin; dwg: 21-0101h (pdf) use pkgcode/variation: b16+1 * -40c to +85c rohs/lead-free: yes materials analysis didn't find what you need? c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y

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